High-speed FPGA configuration and testing through JTAG

Abstract

Since most FPGAs use the universal JTAG port to support configuration memory access, hardware and software tools are needed to maximize the speed of FPGA configuration management over JTAG. This paper introduces a tool called the JTAG Configuration Manager (JCM) that enables high-speed programmable access to the configuration memory of FPGAs through JTAG. This tool consists of a linux-based software library running on an embedded ARM processor paired with a hardware JTAG controller module implemented in programmable logic. This JTAG controller optimizes the speed and timing of JTAG transactions over cables of any length using an automatic speed calibration process. This JTAG interface enables custom configuration sequences to be sent at high speeds. The JCM also has access to all JTAG interfaces of the FPGA including temperature monitoring and internal Boundary SCAN, making it useful for many testing and verification applications.