High-voltage tolerant bi-state self-biasing output driver using cascade complementary latches in twin-well CMOS technology

Abstract

The design of a bi-state output buffer that can handle 5 times the supply voltage is presented. The use of self-biasing stacked devices driven by a cascade of complementary latches allows all devices to operate within the limits set by the technology, thus minimising any hot carrier injection and dielectric stress degradation. The presented voltage extension technique is scalable to larger and smaller external voltages and suitable for all twin-well technology feature sizes. The technique using the cascade of complementary latches is applied to the realization of a CAN output driver in a digital twin-well double-oxide 180nm technology featuring both 1.8V 180nm and 3.3V 350nm CMOS devices. The CAN driver consists of two bi-state drivers, which are both in high-impedance state during the CAN recessive state and in the high and respectively low state for the CAN dominant state. The realized prototype driver can handle external voltages between -3V and 16V and exhibits a 1.5V differential output swing on a 60Ohm load over the military temperature range compliant to the CAN automotive standard. To the best of our knowledge this is also the first realization of a CAN driver in a low-voltage digital CMOS technology.