Feasibility analysis of high-density STTRAM designs with crossbar or shared transistor structures

Abstract

The feasibility of high-density STTRAM design utilizing CBA and 1T-nMTJ structures is analyzed with quantitative device and array models. To be effective, both designs have to employ two-terminal selectors connected with MTJs to suppress sneak current. The writing/reading performance of these designs depends critically on the resistance balance between selectors and MTJs. Selectors with strong nonlinearity and resistance comparable with that of MTJ will improve these high-density designs. These designs may help to relax the stringent requirements on STTRAM access transistors.