Power versus quality trade-offs for adaptive real-time applications

Andrew Nelson, B. Akesson, A. Molnos, Sj Pas, K. Goossens
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引用次数: 7

Abstract

Electronic devices are expected to accommodate evermore complex functionality. Portable devices, such as mobile phones, have experienced a rapid increase in functionality, while at the same time being constrained by the amount of energy that may be stored in their batteries. Dynamic Voltage and Frequency Scaling (DVFS) is a common technique that is used to trade processor speed for a reduction in power consumption. Adaptive applications can reduce their output quality in exchange for a reduction in their execution time. This exchange has been shown to be useful for meeting temporal constraints, but its usefulness for reducing energy/power consumption has not been investigated. In this paper, we present a technique that uses existing DVFS methods to trade a quality decrease for lower power/energy consumption through an intermediary reduction in execution time. Our technique achieves this while meeting soft and/or hard time/energy/power constraints. We demonstrate the applicability of our technique on an adaptive H.263 decoder application, running on a predictable hardware platform that is prototyped on an FPGA. We further contribute an experimental evaluation of the H.263 decoder's scalable mechanisms, in their ability to trade quality for temporal/energy/power. From experimentation, we show that our quality trading technique is able to achieve up to a 45% increase in the number of frames decoded for the same amount of energy, in comparison to frequency scaling alone, but with a quality reduction of up to 22dB Peak Signal-to-Noise Ratio (PSNR).
自适应实时应用的功率与质量权衡
人们期望电子设备能够容纳越来越复杂的功能。便携式设备,如移动电话,已经经历了功能的快速增长,但同时受到其电池中可能存储的能量的限制。动态电压和频率缩放(DVFS)是一种常用的技术,用于交换处理器速度以降低功耗。自适应应用程序可以降低它们的输出质量,以换取减少它们的执行时间。这种交换已被证明对满足时间限制是有用的,但它对减少能源/电力消耗的有用性尚未得到调查。在本文中,我们提出了一种技术,该技术使用现有的DVFS方法通过减少执行时间来降低质量以换取更低的功耗/能耗。我们的技术在满足软/硬时间/能量/功率限制的同时实现了这一点。我们演示了我们的技术在自适应H.263解码器应用程序上的适用性,该应用程序运行在可预测的硬件平台上,该平台是在FPGA上原型的。我们进一步提供了H.263解码器的可扩展机制的实验评估,在他们的交易质量为时间/能量/功率的能力。从实验中,我们表明,与单独的频率缩放相比,我们的质量交易技术能够在相同的能量下实现高达45%的解码帧数增加,但峰值信噪比(PSNR)的质量降低高达22dB。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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