A system LSI memory redundancy technique using an ie-Flash (inverse-gate-electrode flash) programming circuit

2001 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.01CH37185) Pub Date : 2001-06-14 DOI:10.1109/VLSIC.2001.934199

M. Yamaoka, K. Yanagisawa, S. Shukuri, K. Norisue, K. Ishibashi

引用次数: 8

Abstract

A new memory redundancy technique using ie-flash (inverse-gate-electrode flash) memory cells was developed. Ie-flash can be fabricated by the conventional logic CMOS process, so no additional processes are necessary to use it in system LSIs, and it can be programmed by logic tester. This new redundancy technique was successfully implemented in the cache memories of a 32-bit RISC microprocessor.

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一种采用ie-Flash(反栅极闪存)编程电路的系统LSI存储器冗余技术

提出了一种利用ie-flash(逆栅电极闪存)存储单元的存储冗余技术。Ie-flash可以用传统的逻辑CMOS工艺制作，因此不需要在系统lsi中使用额外的工艺，并且可以通过逻辑测试仪进行编程。这种新的冗余技术在32位RISC微处理器的高速缓存存储器中成功实现。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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2001 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.01CH37185)

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