Singular-Value-Decomposition Based Four Port De-embedding and Single-step Error Calibration for On-chip Measurement

Abstract

We present the 4-port based two-step on-chip parasitics de-embedding and single-step error calibration results for on-chip transistor measurements on a 0.13 mum RF CMOS process. SVD is used for solving the unknown 4-port transmission parameters and quantifying the measurement errors in the single-step approach. Despite the less accurate on-chip standards compared to standards on an impedance standard substrate, single-step error calibration gives reasonable Y-parameters for the examined transistor.