{"title":"Design of a true single-phase-clock divider in 0.13µm CMOS","authors":"Lei Wang, Y. Xiong, San-Ming Hu, T. Lim","doi":"10.1109/EDAPS.2010.5683039","DOIUrl":null,"url":null,"abstract":"The design of a true single-phase-clock (TSPC) divider with a division ratio of 8 in 0.13µm BiCMOS technology is presented. Through the careful layout design, the divider is able to operate up to 7.5GHz with the dc voltage supply of 1.8V. The core circuit size is only 80×20µm<sup>2</sup>.","PeriodicalId":185326,"journal":{"name":"2010 IEEE Electrical Design of Advanced Package & Systems Symposium","volume":"19 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 IEEE Electrical Design of Advanced Package & Systems Symposium","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EDAPS.2010.5683039","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
The design of a true single-phase-clock (TSPC) divider with a division ratio of 8 in 0.13µm BiCMOS technology is presented. Through the careful layout design, the divider is able to operate up to 7.5GHz with the dc voltage supply of 1.8V. The core circuit size is only 80×20µm2.