{"title":"Measuring the RthJC of Power Semiconductor Components Using Short Pulses","authors":"Sujay Singh, J. Proulx, A. Vass-Várnai","doi":"10.1109/THERMINIC52472.2021.9626498","DOIUrl":null,"url":null,"abstract":"This article explores the feasibility and acceptability of reducing the test time, to a fraction of the time required to reach the steady-state condition, to obtain the junction-to-case thermal resistance of power semiconductors. Data taken on three package types (TO-247, TO-252, and TO-263) is used in studying the effect of the heating/cooling time on the estimated thermal resistance. The results are in agreement with the FEA simulation, wherein, no change in isothermal surfaces in the package was observed after a few hundred milliseconds. Based on the observations, the deviation from the test conditions referred to in the JEDEC standard does not appear to affect the measurement results. This study demonstrates that the short pulse RthJC measurements could speed up component characterization without altering the measurement uncertainty thus enabling component manufacturers to characterize components in the assembly line.","PeriodicalId":302492,"journal":{"name":"2021 27th International Workshop on Thermal Investigations of ICs and Systems (THERMINIC)","volume":"42 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2021-09-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 27th International Workshop on Thermal Investigations of ICs and Systems (THERMINIC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/THERMINIC52472.2021.9626498","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
This article explores the feasibility and acceptability of reducing the test time, to a fraction of the time required to reach the steady-state condition, to obtain the junction-to-case thermal resistance of power semiconductors. Data taken on three package types (TO-247, TO-252, and TO-263) is used in studying the effect of the heating/cooling time on the estimated thermal resistance. The results are in agreement with the FEA simulation, wherein, no change in isothermal surfaces in the package was observed after a few hundred milliseconds. Based on the observations, the deviation from the test conditions referred to in the JEDEC standard does not appear to affect the measurement results. This study demonstrates that the short pulse RthJC measurements could speed up component characterization without altering the measurement uncertainty thus enabling component manufacturers to characterize components in the assembly line.