Formal security evaluation of hardware Boolean masking against second-order attacks

Houssem Maghrebi, S. Guilley, J. Danger
{"title":"Formal security evaluation of hardware Boolean masking against second-order attacks","authors":"Houssem Maghrebi, S. Guilley, J. Danger","doi":"10.1109/HST.2011.5954993","DOIUrl":null,"url":null,"abstract":"The masking countermeasure in hardware has been widely studied, for its simplicity and its efficiency. Notably, no care is required at backend level and the throughput is not affected with respect to an unprotected implementation. In this article, we are concerned with a formal security evaluation of Boolean hardware masking schemes. Following a practice-oriented evaluation framework introduced at EURO-CRYPT'2009 [22], we compute both leakage and attack metrics. The hardware implementations have the specificity that the signal to noise ratio is below 1. In this particular case, we prove that a leakage metric (namely the mutual information) allows to characterize perfectly the best attack. This was previously unknown; moreover, we exhibit explicitly the links between leakage and attacks metrics. This result is in line with [10] but conflicts with [24]. More precisely, second-order DPA with a centered product combination function yields the largest leaks and the most powerful attacks. However, those are not possible if the implementation is “zero-offset”, an implementation of first-order masking only possible in hardware. Furthermore, even the sub-optimal attacks are impeded, due to the high noise that characterizes parallel hardware crypto-processors. Therefore, masked implementations in hardware reach much higher security levels than software counterparts while not degrading significantly the computation throughput.","PeriodicalId":300377,"journal":{"name":"2011 IEEE International Symposium on Hardware-Oriented Security and Trust","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2011-06-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2011 IEEE International Symposium on Hardware-Oriented Security and Trust","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/HST.2011.5954993","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4

Abstract

The masking countermeasure in hardware has been widely studied, for its simplicity and its efficiency. Notably, no care is required at backend level and the throughput is not affected with respect to an unprotected implementation. In this article, we are concerned with a formal security evaluation of Boolean hardware masking schemes. Following a practice-oriented evaluation framework introduced at EURO-CRYPT'2009 [22], we compute both leakage and attack metrics. The hardware implementations have the specificity that the signal to noise ratio is below 1. In this particular case, we prove that a leakage metric (namely the mutual information) allows to characterize perfectly the best attack. This was previously unknown; moreover, we exhibit explicitly the links between leakage and attacks metrics. This result is in line with [10] but conflicts with [24]. More precisely, second-order DPA with a centered product combination function yields the largest leaks and the most powerful attacks. However, those are not possible if the implementation is “zero-offset”, an implementation of first-order masking only possible in hardware. Furthermore, even the sub-optimal attacks are impeded, due to the high noise that characterizes parallel hardware crypto-processors. Therefore, masked implementations in hardware reach much higher security levels than software counterparts while not degrading significantly the computation throughput.
硬件布尔屏蔽抗二阶攻击的形式化安全评估
硬件掩蔽对抗以其简单、高效的特点得到了广泛的研究。值得注意的是,在后端级别不需要注意,并且吞吐量不会受到不受保护的实现的影响。在本文中,我们关注布尔硬件屏蔽方案的正式安全评估。根据EURO-CRYPT'2009[22]上引入的以实践为导向的评估框架,我们计算了泄漏和攻击指标。硬件实现具有信噪比小于1的专一性。在这种特殊情况下,我们证明了泄漏度量(即互信息)允许完美地表征最佳攻击。这在以前是未知的;此外,我们明确地展示了泄漏和攻击指标之间的联系。该结果与[10]一致,但与[24]冲突。更准确地说,二阶DPA与中心产品组合函数产生最大的泄漏和最强大的攻击。然而,如果实现是“零偏移”,这些是不可能的,一阶屏蔽的实现只能在硬件中实现。此外,由于并行硬件加密处理器的高噪声特征,即使是次优攻击也受到阻碍。因此,硬件中的掩码实现比软件中的实现达到更高的安全级别,同时不会显著降低计算吞吐量。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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