Emerging reliability challenges in electronic packaging

Abstract

The trend for microelectronic devices has historically been, and will continue to be, towards smaller feature size, faster speeds, more complexity, higher power and lower cost. The motivating force behind these advances has traditionally been microprocessors. With the tremendous growth of wireless telecommunication, RF applications are beginning to drive many areas of microelectronics traditionally led by the development of the microprocessor. An increasingly dominant factor in RF microelectronics is electronic packaging and the reliability of the package and the materials that comprise the package and, in particular, the solder interconnects. The need for Pb-free assembly and the application to hand-held electronics has challenged the reliability of electronic packages. This paper discusses packaging reliability of solder interconnects for hand-held wireless and RF applications and describe the tests used to evaluate reliability. The specific reliability issues discussed will be thermomechanical stress (fatigue), solder joint electromigration (DC and RF) and high speed impact stresses (drop test performance).