Error Resilience Evaluation of Approximate Storage in the Intra Prediction of VVC Decoders

Matheus Isquierdo, Renira Soares, F. Sampaio, B. Zatt, D. Palomino
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引用次数: 2

Abstract

This paper presents an error resilience evaluation of the intra prediction in VVC decoders when approximate storage is employed in the Reference Line Buffer (RLB). We present an error injection framework to simulate the use of approximate storage in the RLB buffer with commonly used Bit Error Rate (BER) values from literature for SRAM and DRAM technologies. We also perform the resilience evaluation considering different decoding configurations. Our analysis characterizes how the impacts of approximation are dependent on video content and configurations. The results show that approximate storage can be used in some of the evaluated scenarios with very low degradation on the final visual quality of the decoded video sequences.
近似存储在VVC解码器帧内预测中的容错性评价
本文研究了在参考线缓冲器(RLB)中采用近似存储时,VVC解码器的帧内预测的容错性评估。我们提出了一个错误注入框架来模拟RLB缓冲中近似存储的使用,并使用SRAM和DRAM技术的文献中常用的误码率(BER)值。我们还在考虑不同解码配置的情况下进行了弹性评估。我们的分析描述了近似的影响是如何依赖于视频内容和配置的。结果表明,近似存储可以在一些评估场景中使用,并且对解码视频序列的最终视觉质量降低很小。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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