A high voltage narrow pulse generator in nanometre CMOS process

Rongbin Hu, Lei Zhang
{"title":"A high voltage narrow pulse generator in nanometre CMOS process","authors":"Rongbin Hu, Lei Zhang","doi":"10.1109/INEC.2016.7589262","DOIUrl":null,"url":null,"abstract":"A high voltage narrow pulse generating circuit (HNPG) in 90nm CMOS process is introduced which can produce a narrow pulse with amplitude of twice the level of the power supply and can be used to turn on a NMOS transistor completely in a short time in the low power supply environment of 90nm CMOS process. The circuit, which is applied for a patent with the application number 201510243084.6 [1], solves the problem that under the low power level of the nano-metre CMOS process chips, a NMOS transistor can't be turned on completely. The sampling rate of the tracking and holding circuit which employ the HNPG is improved from 700Msps to 1.25Gsps and other performances are also enhanced, with only a little punishment of chip area and power consumption.","PeriodicalId":416565,"journal":{"name":"2016 IEEE International Nanoelectronics Conference (INEC)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-05-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE International Nanoelectronics Conference (INEC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/INEC.2016.7589262","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
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Abstract

A high voltage narrow pulse generating circuit (HNPG) in 90nm CMOS process is introduced which can produce a narrow pulse with amplitude of twice the level of the power supply and can be used to turn on a NMOS transistor completely in a short time in the low power supply environment of 90nm CMOS process. The circuit, which is applied for a patent with the application number 201510243084.6 [1], solves the problem that under the low power level of the nano-metre CMOS process chips, a NMOS transistor can't be turned on completely. The sampling rate of the tracking and holding circuit which employ the HNPG is improved from 700Msps to 1.25Gsps and other performances are also enhanced, with only a little punishment of chip area and power consumption.
一种纳米CMOS制程高压窄脉冲发生器
介绍了一种90nm CMOS工艺的高压窄脉冲产生电路(HNPG),该电路能产生幅值为电源电平两倍的窄脉冲,在90nm CMOS工艺的低功耗环境下,可在短时间内完全导通NMOS晶体管。该电路已申请专利号为201510243084.6[1],解决了纳米CMOS工艺芯片在低功率水平下,NMOS晶体管无法完全导通的问题。采用HNPG的跟踪保持电路的采样率从700Msps提高到1.25Gsps,其他性能也得到了提高,而芯片面积和功耗受到的影响很小。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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