A novel fully self-aligned process for high cell density trench gate power MOSFETs

Abstract

A novel self-aligned process for high cell density trench gate power MOSFETs with only four mask layers was proposed. The specific on-resistance can be as low as 0.21 m/spl Omega/.cm/sup 2/ With 1.5 /spl mu/m cell pitch and 35 V breakdown voltage. Because this process shrinks trench space but not trench width, the quasi-saturation phenomenon is lighter. After optimization of the thickness of n- drift layer and n+ substrate, a specific on-resistance lower than 0.1 m/spl Omega/.cm/sup 2/ with 0.6 /spl mu/m technology could be expected.