Decoupling capacitor derating study under DC bias and cooling environment

Baolong Li
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Abstract

Passive electronics devices, especial capacitor's capacitance will be changed under different working voltage and thermal condition, which is called derating or degrading. Comparing traditional DoE (Design on Experimental) method to study derating problem, using electrical thermal multiphysics simulation, is more accurate and efficient. In this paper, a simple printed PCB with decoupling capacitors will be simulated under several scenarios: DoE, normal condition(non-derating), derated by working voltage, and derated by working voltage and temperature condition. By comparing the power impedance and noise value under those scenarios, advantages of multiphysics simulation for capacitor's derating will be proved.
直流偏置和冷却环境下去耦电容降额研究
无源电子器件,特别是电容器的电容在不同的工作电压和热条件下会发生变化,称为降额或退化。与传统的实验设计方法相比,采用电热多物理场模拟方法研究降额问题更加准确和高效。在本文中,将对一个简单的带有去耦电容的印刷PCB在几种情况下进行仿真:DoE,正常状态(不降额),工作电压降额以及工作电压和温度降额。通过对这些场景下的功率阻抗和噪声值的比较,证明了多物理场模拟电容降额的优越性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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