Modeling of thermal resistance dependence on design parameters in silicon-on-glass bipolar transistors

Abstract

This contribution investigates the scalability of thermal resistance in modem RF bipolar transistors. Several different geometries of silicon-on-glass devices are numerically simulated in 3-D and the dependencies on geometric features are evidenced. A convenient meshing procedure is specifically developed for very thin geometries. Simulations are supported by a compact closed-form analytical model. The combination of both simulations and the model allows prediction of thermal resistance at device design stage.