Nanoscale SiGe BiCMOS technologies: From 55 nm reality to 14 nm opportunities and challenges

Abstract

This paper looks back to the development of highspeed BiCMOS technologies in STMicroelectronics for the past 15 years and discusses the perspectives for next generations through the CMOS angle. Opportunities and challenges of nanoscale BiCMOS technologies are reviewed and BiCMOS055 results are presented to demonstrate the feasibility at 55 nm node. Perspectives to offer FDSOI BiCMOS technologies at 28 nm or 14 nm nodes are analyzed too.