Challenges in analog IC design submicron CMOS technologies

Abstract

In submicron CMOS devices, short-channel effects lead to shifts in threshold voltage, increased mismatch and noise. The velocity saturation limits the obtainable transconductance and hence also the high-speed performance. Lower supply voltages require the operational amplifier building block to operate rail-to-rail. In delta-sigma converters this leads to very-low-power converters. Considerable attention is given to circuit design for telecommunication applications, in which the inductor is making a comeback. The ultimate challenge-of analog design however is the cointegration with digital blocks, causing coupling noise and requiring sophisticated tools.