A 68-82 GHz integrated wideband linear receiver using 0.18 µm SiGe BiCMOS

Abstract

This paper presents a highly integrated wideband linear receiver with on-chip active frequency doubler implemented in a low-cost 200/180 GHz fT/fmax 0.18 µm SiGe BiCMOS technology. Individual receiver circuit blocks including low-noise amplifier, passive balun, mixer, and frequency doubler have been independently characterized and optimized for wideband, NF, and linearity performance. The receiver highlights a 3 dB RF bandwidth of larger than 14 GHz from 68 GHz to at least 82 GHz. The measured peak power conversion gain is 28.1 dB with an input 1 dB compression point of −23.6 dBm, and NF of 8 dB at 77 GHz. Noise figures of 8–10 dB are achieved over the 3 dB bandwidth. The overall chip size is 1350 × 990 µm2 and the total power consumption is 413 mW. To the best of authors' knowledge, this receiver reports the highest 3 dB RF bandwidth with excellent linearity performance among all the prior arts in SiGe HBT/BiCMOS technologies to date.