{"title":"A robust start-up Class-C CMOS VCO based on a common mode low frequency feedback loop","authors":"Stefano Perticaroli, F. Palma","doi":"10.1109/ESSCIRC.2014.6942093","DOIUrl":null,"url":null,"abstract":"Many Class-C CMOS VCOs have been introduced in the last decade claiming to achieve improved phase noise performance and power efficiency with apparently no tradeoff, however only in the past two years implementation efforts have been focused on stability related issues of such oscillator architectures. In fact, oscillators exploiting time-varying bias techniques may present several stability points and for this reason dedicated start-up circuits are needed to reach the desired periodic steady state regime. In this paper we introduce a novel stabilization technique for a CMOS VCO polarized in Class-C via a common mode feedback loop with the aim to ensure a robust start-up with no significant phase-noise and power efficiency degradation. The VCO core is based on a crossed pair of NMOS devices refilling a symmetric resonator with a center tapered inductor and biased by a top PMOS current generator. The proposed Class-C VCO is implemented in a RF 55nm CMOS technology and is tunable over the frequency band 6.6-8.2 GHz with average phase noise lower than -127 dBc/Hz @ 1 MHz offset and mean power consumption of 18mW, for a state-of-the-art figure-of-merit of -190 dBc/Hz @ 1 MHz offset.","PeriodicalId":202377,"journal":{"name":"ESSCIRC 2014 - 40th European Solid State Circuits Conference (ESSCIRC)","volume":"166 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-11-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"ESSCIRC 2014 - 40th European Solid State Circuits Conference (ESSCIRC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESSCIRC.2014.6942093","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 5
Abstract
Many Class-C CMOS VCOs have been introduced in the last decade claiming to achieve improved phase noise performance and power efficiency with apparently no tradeoff, however only in the past two years implementation efforts have been focused on stability related issues of such oscillator architectures. In fact, oscillators exploiting time-varying bias techniques may present several stability points and for this reason dedicated start-up circuits are needed to reach the desired periodic steady state regime. In this paper we introduce a novel stabilization technique for a CMOS VCO polarized in Class-C via a common mode feedback loop with the aim to ensure a robust start-up with no significant phase-noise and power efficiency degradation. The VCO core is based on a crossed pair of NMOS devices refilling a symmetric resonator with a center tapered inductor and biased by a top PMOS current generator. The proposed Class-C VCO is implemented in a RF 55nm CMOS technology and is tunable over the frequency band 6.6-8.2 GHz with average phase noise lower than -127 dBc/Hz @ 1 MHz offset and mean power consumption of 18mW, for a state-of-the-art figure-of-merit of -190 dBc/Hz @ 1 MHz offset.