Dynamic reconfiguration schemes for mega bit BiCMOS SRAMs

Records of the 1993 IEEE International Workshop on Memory Testing Pub Date : 1993-08-09 DOI:10.1109/MT.1993.263137

V.N. Rayapati, B. Kaminska

引用次数: 0

Abstract

In this paper two dynamic reconfiguration schemes are discussed for mega bit BiCMOS SRAMs. These schemes allow the failure detection at the chip level and automatic reconfiguration to fault free memory cells within the chip. BiCMOS SRAM access time improvement of about 35%, chip area of 25%, and chip yield of 10% are achieved respectively, as compared to the conventional methods.<>

查看原文本刊更多论文

百万比特BiCMOS ram的动态重构方案

本文讨论了两种用于百万比特BiCMOS ram的动态重构方案。这些方案允许在芯片级进行故障检测，并自动重新配置到芯片内的无故障存储单元。与传统方法相比，BiCMOS SRAM的存取时间提高了约35%，芯片面积提高了25%，芯片良率提高了10%。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

求助全文

约1分钟内获得全文求助全文

来源期刊

Records of the 1993 IEEE International Workshop on Memory Testing

自引率

0.00%

发文量