{"title":"Single-chip RNS two port parallel adaptor for wave digital filters","authors":"G. Cardarilli, F. Sargeni","doi":"10.1109/EUASIC.1991.212895","DOIUrl":null,"url":null,"abstract":"A method based on the residue number system (RNS) arithmetic is used. This method allows one to overcome these difficulties and to obtain high speed and low complexity WDF devices. In particular, the speed performance can be improved through the use of parallel processors defined in terms of RNS, while the occupied area can be reduced realizing suitable isomorphism tables and reducing multiplier complexity to that of a sum. In this paper, an ASIC RNS implementation of a two-port constrained parallel adaptor for WDFs is presented.<<ETX>>","PeriodicalId":118990,"journal":{"name":"Euro ASIC '91","volume":"281 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1991-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Euro ASIC '91","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EUASIC.1991.212895","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
A method based on the residue number system (RNS) arithmetic is used. This method allows one to overcome these difficulties and to obtain high speed and low complexity WDF devices. In particular, the speed performance can be improved through the use of parallel processors defined in terms of RNS, while the occupied area can be reduced realizing suitable isomorphism tables and reducing multiplier complexity to that of a sum. In this paper, an ASIC RNS implementation of a two-port constrained parallel adaptor for WDFs is presented.<>