Reduced power consumption Current-mode ADC using SAR logic for AI application

Abstract

This paper introduces a new SAR logic that does not need to refer to the upper digital bits to overcome the limitation that the speed can be limited by the conversion time of the comparator by using conventional SAR logic. This proposed logic can be applied to a current-mode flash type ADC and it can be realized with a system consisting of current comparators, encoders and an input generator made up of current rectifiers. The proposed circuit has been implemented using 0.18-um CMOS technology. This circuit operates at a supply voltage of 3.3-V and its input current range is 0–100 μA. The active layout area of the 6-bit current-mode ADC is 341-μm×158 μm, The power consumption is estimated to be 2.4-mW when the input frequency is 100 kHz.