{"title":"MINLP Based Power Optimization for Pipelined ADC","authors":"A. Purushothaman","doi":"10.1109/ISVLSI.2016.64","DOIUrl":null,"url":null,"abstract":"This paper proposes a Mixed Integer Non-linear Programming (MINLP) based optimization algorithm to design power optimized pipelined ADC. For a given specification the proposed algorithm gives stage resolution and sampling capacitor per stage that minimizes the total power consumption. Closed form expressions of the power consumption of each stage were derived and used as objective function. Pipelined ADCs of various specifications, viz., 10-bit, 12-bit, and 16-bit, were designed and validated using this algorithm.","PeriodicalId":140647,"journal":{"name":"2016 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)","volume":"21 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"9","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISVLSI.2016.64","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 9
Abstract
This paper proposes a Mixed Integer Non-linear Programming (MINLP) based optimization algorithm to design power optimized pipelined ADC. For a given specification the proposed algorithm gives stage resolution and sampling capacitor per stage that minimizes the total power consumption. Closed form expressions of the power consumption of each stage were derived and used as objective function. Pipelined ADCs of various specifications, viz., 10-bit, 12-bit, and 16-bit, were designed and validated using this algorithm.