Study of Switching Transients based on dv/dt and di/dt for a GaN-based Two-Level Pole

Abstract

The faster switching transients of GaN devices lead to extremely low switching loss. This is a key feature that makes GaN devices a potential candidate for power converters driving high speed electric machines. The switching transients occur in tens of nanoseconds leading to very high dv/dt and di/dt. This leads to several challenges for both power converter as well as motor load. Switching device voltage overshoot and insulation stress for motors are key concerns among them. A practical operation of power converter needs to consider minimizing the losses while addressing these challenges. Analytical models for switching transient help in investigating the mitigation of these challenges from the gate drive side. This paper presents a systematic modeling approach that divides the turn-on and turn-off transient intervals of a GaN-based two-level pole into sub-intervals responsible for di/dt and dv/dt. The switching loss contribution of each sub-interval and their role in transient overshoot is highlighted. Using switching device voltage overshoot and motor dv/dt as two important constraints, an optimal gate drive is then proposed, which minimizes the switching loss. Spice simulation results are presented for the proposed optimal gate drive of 650 V, 60 A GaN device operating at 400 V DC bus voltage and 40 A device current.