Efficient observation point selection for aging monitoring

Abstract

Circuit aging causes a performance degradation and eventually a functional failure. It depends on the workload and the environmental condition of the system, which are hard to predict in early design phases resulting in pessimistic design. Existing delay monitoring schemes measure the remaining slack of paths in the circuit, but have a high hardware penalty including global wiring. More importantly, a low sensitization ratio of long paths in applications may lead to a very low measurement frequency or even unmonitored timing violations. In this work, we propose a delay monitor placement method by analyzing the topological circuit structure and sensitization of paths. The delay monitors are inserted at meticulously selected positions in the circuit, named observation points (OPs). This OP monitor placement method can reduce the number of inserted monitors by up to 98% compared to a placement at the end of long paths. The experimental validation shows the effectiveness of this aging indication, i.e. a monitor issues an alert always earlier than any imminent timing failure.