{"title":"Modeling of Electromigration Failure Distribution of Cu Vias: Critical Current Density Effects and Reliability Extrapolation Procedures","authors":"A. Oates, M. H. Lin","doi":"10.1109/IPFA.2009.5232737","DOIUrl":null,"url":null,"abstract":"The ever increasing demand for higher performance integrated circuits has led to the introduction of Cu / low-k interconnects. Electromigration failure of Cu interconnects is one of the major reliability concerns for circuits because dual damascene vias are inherently susceptible to void formation. Moreover, technology scaling leads to increased current carrying requirements, and this together with smaller critical geometries (i.e. smaller volumes of material associated with failure) presents an increasing challenge to ensure the long-term reliability of interconnects. The development of predictive models of via electromigration failure is an essential aspect of continued circuit reliability assurance. One significant challenge to the development of reliability models is the existence of multiple voiding modes in Cu vias. Development of accurate models requires a fundamental understanding of these voiding morphologies as a function of stress conditions, conductor geometry and processing, together with knowledge of void nucleation and growth kinetics.","PeriodicalId":210619,"journal":{"name":"2009 16th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits","volume":"8 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2009-07-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2009 16th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IPFA.2009.5232737","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
The ever increasing demand for higher performance integrated circuits has led to the introduction of Cu / low-k interconnects. Electromigration failure of Cu interconnects is one of the major reliability concerns for circuits because dual damascene vias are inherently susceptible to void formation. Moreover, technology scaling leads to increased current carrying requirements, and this together with smaller critical geometries (i.e. smaller volumes of material associated with failure) presents an increasing challenge to ensure the long-term reliability of interconnects. The development of predictive models of via electromigration failure is an essential aspect of continued circuit reliability assurance. One significant challenge to the development of reliability models is the existence of multiple voiding modes in Cu vias. Development of accurate models requires a fundamental understanding of these voiding morphologies as a function of stress conditions, conductor geometry and processing, together with knowledge of void nucleation and growth kinetics.