Modeling of Electromigration Failure Distribution of Cu Vias: Critical Current Density Effects and Reliability Extrapolation Procedures

A. Oates, M. H. Lin
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Abstract

The ever increasing demand for higher performance integrated circuits has led to the introduction of Cu / low-k interconnects. Electromigration failure of Cu interconnects is one of the major reliability concerns for circuits because dual damascene vias are inherently susceptible to void formation. Moreover, technology scaling leads to increased current carrying requirements, and this together with smaller critical geometries (i.e. smaller volumes of material associated with failure) presents an increasing challenge to ensure the long-term reliability of interconnects. The development of predictive models of via electromigration failure is an essential aspect of continued circuit reliability assurance. One significant challenge to the development of reliability models is the existence of multiple voiding modes in Cu vias. Development of accurate models requires a fundamental understanding of these voiding morphologies as a function of stress conditions, conductor geometry and processing, together with knowledge of void nucleation and growth kinetics.
铜过孔电迁移失效分布的建模:临界电流密度效应和可靠性外推程序
对高性能集成电路不断增长的需求导致了Cu /低k互连的引入。铜互连的电迁移失效是电路可靠性的主要问题之一,因为双damascene过孔本身就容易形成空洞。此外,技术规模化导致承载电流的要求增加,再加上更小的关键几何形状(即与故障相关的更小体积的材料),对确保互连的长期可靠性提出了越来越大的挑战。建立通孔电迁移故障预测模型是保证连续电路可靠性的一个重要方面。可靠性模型开发面临的一个重大挑战是Cu过孔中存在多种失效模式。开发准确的模型需要对这些空泡形态作为应力条件,导体几何形状和加工的函数有基本的了解,以及空泡成核和生长动力学的知识。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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