Lead compensation to improve the stability of a two stage rail-to-rail CMOS opamp

Abstract

The design issues of a two-stage rail-to-rail operational amplifier are discussed in this paper. Current regulation during common mode voltage sweep allows us to apply a lead compensation technique, and a simple scheme enables temperature and process variation robustness. This compensation involves 15 degrees improvement in the phase margin when resistive elements are introduced in the compensation path. The proposed opamp has been implemented and measurements show a 10.4 MHz unity gain bandwidth (GBW) with a minimal phase margin of around 54/spl deg/ for a capacitive load of 35 pF. In addition, a slew rate of about 14 V//spl mu/s is attained and the current consumption is maintained below 530 /spl mu/A.