S. Popa, S. Martoiu, M. Luchian, R. Coliban, M. Ivanovici
{"title":"The Quality-Assurance Test of the ATLAS New Small Wheel Read-Out Controller ASIC","authors":"S. Popa, S. Martoiu, M. Luchian, R. Coliban, M. Ivanovici","doi":"10.22323/1.343.0081","DOIUrl":null,"url":null,"abstract":"The Read-Out Controller (ROC) ASIC will be used to store, de-randomize, aggregate, filter and form complex packets with the digitized data coming from the New Small Wheel (NSW) muon detectors of the ATLAS experiment. The ASIC test setup is based on a Xilinx Kintex Ultrascale FPGA evaluation board, implementing input data streams emulators and output data analyzers for functional verification which are controlled and monitored by a MicroBlaze microprocessor. The jitter and skew of the ASIC’s PLL outputs are measured using oscilloscopes and logic analyzers. The design validation, test procedure and quality-assurance mass-testing results are presented.","PeriodicalId":400748,"journal":{"name":"Proceedings of Topical Workshop on Electronics for Particle Physics — PoS(TWEPP2018)","volume":"47 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-05-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of Topical Workshop on Electronics for Particle Physics — PoS(TWEPP2018)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.22323/1.343.0081","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4
Abstract
The Read-Out Controller (ROC) ASIC will be used to store, de-randomize, aggregate, filter and form complex packets with the digitized data coming from the New Small Wheel (NSW) muon detectors of the ATLAS experiment. The ASIC test setup is based on a Xilinx Kintex Ultrascale FPGA evaluation board, implementing input data streams emulators and output data analyzers for functional verification which are controlled and monitored by a MicroBlaze microprocessor. The jitter and skew of the ASIC’s PLL outputs are measured using oscilloscopes and logic analyzers. The design validation, test procedure and quality-assurance mass-testing results are presented.