A Configurable Mixed-Precision Convolution Processing Unit Generator in Chisel

Jure Vreča, Anton Biasizzo
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Abstract

We present a configurable implementation of a convolution processing unit suitable for computing mixed-precision quantized neural networks. The design is implemented as a hardware generator written in Chisel, which is a software framework for writing hardware circuit generators. Our generator is designed to use minimal hardware resources and is very flexible in regards to various aspects of the convolution operation, including: image size, kernel size, image bitwidth, kernel bitwidth, activation function, and more. The processing unit is configurable only at generation time, thus we don’t pay the price of using more general hardware, instead we can tailor it to the problem at hand.
凿子中可配置混合精度卷积处理单元生成器
我们提出了一种适合计算混合精度量化神经网络的卷积处理单元的可配置实现。设计实现为一个用Chisel编写的硬件生成器,它是一个编写硬件电路生成器的软件框架。我们的生成器被设计为使用最少的硬件资源,并且在卷积操作的各个方面都非常灵活,包括:图像大小、内核大小、图像位宽、内核位宽、激活函数等等。处理单元仅在生成时可配置,因此我们不必为使用更通用的硬件而付出代价,相反,我们可以根据手头的问题对其进行定制。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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