Design and verification of a low-cost reconfigurable 16-QAM system

Abstract

Field Programmable Gate Array (FPGA) has been widely used in automotive, broadcast, high performance computing, video and image processing. In this paper, a reconfigurable 16-QAM system is designed using hardware description language (HDL). An efficient design with less logic resource usage and better design compatibility has been implemented on an FPGA. Additionally, a cross-tool design flow is discussed for project verification. This type of study could have a broader impact in communication research and education.