{"title":"TCAD assessment of dual material gate nanoscale RingFET (DMG-RingFET) for analog and digital applications","authors":"Sachin Kumar, V. Kumari, Mridula Gupta, M. Saxena","doi":"10.1109/ICDCSYST.2014.6926181","DOIUrl":null,"url":null,"abstract":"In this work, the impact of gate material engineering on the performance of RingFET architecture i.e. Dual Material Gate RingFET (DMG-RingFET) has been investigated for the first time using ATLAS 3D device simulation. A fair comparison has also been drawn between the performance of DMG-RingFET and SMG RingFET device architectures. The impact of high-k gate dielectric on the performance of DMG RingFET has also been presented. Various important analog and digital performance metrics such as drain current (Ids), transconductance (gm), transconductance generation efficiency (gm/Ids), early voltage (Vea), output voltage of inverter and inverter gain has been discussed in detail. In addition to this investigation of DMG-RingFET as an inverter has been performed to demonstrate the reliability of DMG-RingFET architecture for digital circuit application.","PeriodicalId":252016,"journal":{"name":"2014 2nd International Conference on Devices, Circuits and Systems (ICDCS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-03-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2014 2nd International Conference on Devices, Circuits and Systems (ICDCS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICDCSYST.2014.6926181","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4
Abstract
In this work, the impact of gate material engineering on the performance of RingFET architecture i.e. Dual Material Gate RingFET (DMG-RingFET) has been investigated for the first time using ATLAS 3D device simulation. A fair comparison has also been drawn between the performance of DMG-RingFET and SMG RingFET device architectures. The impact of high-k gate dielectric on the performance of DMG RingFET has also been presented. Various important analog and digital performance metrics such as drain current (Ids), transconductance (gm), transconductance generation efficiency (gm/Ids), early voltage (Vea), output voltage of inverter and inverter gain has been discussed in detail. In addition to this investigation of DMG-RingFET as an inverter has been performed to demonstrate the reliability of DMG-RingFET architecture for digital circuit application.