On The Contribution of Secondary Holes in Hot-Carrier Degradation – a Compact Physics Modeling Perspective

Abstract

We extend our compact physics model for hot-carrier degradation (HCD) by implementing the contribution to damage caused by the secondary carriers (generated by impact ionization) and revisiting transport modeling for primary carriers. To verify the model we employ planar field-effect transistors (FETs) with a gate length of 28 nm, which were subjected to HC stress under $V_{\text{gs}}=V_{\text{ds}}(V_{\text{gs}}$, and $V_{\text{ds}}$ are gate and drain voltages, respectively) and at conditions with $V_{\text{gs}}$ much lower than $V_{\text{ds}}$. We show that in the former case the contribution of secondary holes is small, whereas at lower $V_{\text{gs}}$ the secondary holes result in a substantial portion of damage, especially at higher $V_{\mathrm{d}\mathrm{s}}$. Finally, we show that the model can accurately capture experimental changes of the linear drain current induced by HC stress.