Quaternary logic for carry-lookahead binary addition

Abstract

The role of the quaternary (four-valued) logic in speeding up the binary addition is discussed. An improved carry-lookahead adder circuit, which is completely realizable by binary gates, is presented. The speed of the proposed n-bit adder is compared to the traditional carry-lookahead n-bit adder in terms of gate delays and fan-in. Results show that the proposed adder is faster in certain ranges determined by n. For an 8-bit adder, the circuit can save 37.5% of the traditional circuit time (in gate delays).<>