A 65nm 376nA 0.4V linear classifier using time-based matrix-multiplying ADC with non-linearity aware training

Abstract

A 6-bit time-based folding matrix multiplication technique for support vector machine (SVM) classification is proposed. A voltage controlled oscillator (VCO) based analog-to-digital converter (ADC) performs in-situ matrix multiplications (MM) along with analog to digital conversion. It also offers a low supply voltage of operation (down to 0.4V) and an input range of 0.8V, drawing a total of 376nA of current. We propose a technique to extend the input range of the VCO based ADC using a folding technique. The classifier is trained considering the non-linearity of the VCO, which results in 5X lower power at iso-accuracy. An accuracy of 93% is achieved with adaboost at the digital back-end with linear SVM as the weak classifier.