Accelerated Fatigue Testing and Lifetime Modelling of Solder Interconnects in Power Electronics

Abstract

Lifetime estimates for modules of power electronics are usually derived from power cycling tests, which are very time consuming. Due to Joule heating of the device, temperature changes are caused leading to thermomechanical stresses between the different constituent materials. In order to obtain an accelerated test method, the mechanical fatigue of solder interconnects was tested in three and four point bending at a frequency of 20 kHz. Thereby, two different sample types were used, where the first type is designed for testing of the solder joint between silicon chip and DBC (direct bonded copper) substrate, while the second sample type is designed for testing the solder between DBC substrate and the base plate. A comparison of stresses generated by bending and power cycling is obtained from Finite Element computer simulations. In conclusion, a lifetime model is established for solder interconnects, which is based on the amount of elastic and plastic strains observed in the solder material.