Nested miller active-capacitor frequency compensation for low-power three-stage amplifiers

Abstract

A new frequency compensation technique for low-power, area-efficient multistage amplifiers is introduced in this work. By utilizing active capacitors to realize the compensation network in a nested way, two inverting gain stages can be used as the second and third gain-stages. The proposed scheme reaches better bandwidth-to-power and slew-rate-to-power performances comparing to the ever published works. Implemented in a standard 0.35 um CMOS technology, the proposed three-stage amplifier achieves 112-dB DC gain, 1.7-M GBW, 47deg phase margin and 1.95-V/mus average slew rate under a 500 pF capacitive load. All of these are realized with only 38 muW power consumption under a 2-V power supply and with very small compensation capacitors.