L. Bubb, M. Edwards, P. Green, C. Pimlott, K. Rees, M. Stewart, A. Taylor, M. Vakondios, J. Yates
{"title":"A run-time support environment for reconfigurable systems","authors":"L. Bubb, M. Edwards, P. Green, C. Pimlott, K. Rees, M. Stewart, A. Taylor, M. Vakondios, J. Yates","doi":"10.1109/DSD.2001.952257","DOIUrl":null,"url":null,"abstract":"This paper presents a novel FPGA Support System (FSS) that facilitates the execution of hardware-based tasks on a dynamically reconfigurable FPGA. The FSS provides the mechanisms to support the placement, execution and removal of blocks on the FPGA. A key feature of the FSS is its ability to provide communication between concurrently executing hardware blocks and software objects during the run-time of a system. The FSS was initially developed to run on a hardware platform consisting of an ARM7 processor interfaced to a Xilinx 6264 FPGA and a dual-port memory. The design, implementation and current status of the FSS are discussed, together with our initial results based on the implementation of a discrete wavelet transform application.","PeriodicalId":285358,"journal":{"name":"Proceedings Euromicro Symposium on Digital Systems Design","volume":"41 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2001-09-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings Euromicro Symposium on Digital Systems Design","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DSD.2001.952257","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
Abstract
This paper presents a novel FPGA Support System (FSS) that facilitates the execution of hardware-based tasks on a dynamically reconfigurable FPGA. The FSS provides the mechanisms to support the placement, execution and removal of blocks on the FPGA. A key feature of the FSS is its ability to provide communication between concurrently executing hardware blocks and software objects during the run-time of a system. The FSS was initially developed to run on a hardware platform consisting of an ARM7 processor interfaced to a Xilinx 6264 FPGA and a dual-port memory. The design, implementation and current status of the FSS are discussed, together with our initial results based on the implementation of a discrete wavelet transform application.