An Improved Cauer Model of IGBT Module Considering Chip Solder Degradation

Abstract

The failure of insulated gate bipolar transistor (IGBT) modules is mainly attributed to temperature factors and accurate estimation of the junction temperature of IGBT modules is crucial to enhance their reliability. However, existing thermal models still have certain limitations in accurately predicting the junction temperature, particularly when considering the degradation of chip solder. In this paper, a realistic model of voids in the chip solder is created using the Monte Carlo Representative Volume Element Generator (MCRVEGen) algorithm. Additionally, an improved Cauer model that considers voids in the chip solder is established and the method for extracting thermal parameters is discussed. Finally, the accuracy of the proposed model is verified through finite element simulation.