Modeling of Carrier Trapping and Its Impact on Switching Performance

Abstract

This investigation focusses on the effect of carrier-trapping on device characteristics. It is demonstrated that consideration of the trap density of states and the trap-time constant in the compact model is sufficient to reproduce the resulting effect on device characteristics both accurately and in a consistent way. With model-parameter extraction from conventional I-V measurements and device-switching characteristics, the carrier-trapping effect on circuit performance can also be predicted accurately. The long-term dynamic carrier-trapping increase can be investigated on the same platform through the use of the additional stress measurements.