{"title":"Design of a Second Order CMOS Sigma-Delta A/D Converter with a 150 MHz Clock Rate","authors":"B. Hallgren","doi":"10.1109/ESSCIRC.1992.5468421","DOIUrl":null,"url":null,"abstract":"A continuous time filter current switching sigma delta converter operating at a frequency of 150 MHz has been developed in 2 ¿m CMOS technology. The design of the main components of the converter is described including a very high speed comparator, an integrator and a one bit D/A-converter. Measurements show a 10 bit dynamic range with 9 bit resolution at an oversampling rate of 128.","PeriodicalId":242379,"journal":{"name":"ESSCIRC '92: Eighteenth European Solid-State Circuits conference","volume":"139 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1992-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"ESSCIRC '92: Eighteenth European Solid-State Circuits conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESSCIRC.1992.5468421","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 8
Abstract
A continuous time filter current switching sigma delta converter operating at a frequency of 150 MHz has been developed in 2 ¿m CMOS technology. The design of the main components of the converter is described including a very high speed comparator, an integrator and a one bit D/A-converter. Measurements show a 10 bit dynamic range with 9 bit resolution at an oversampling rate of 128.