{"title":"Digitally intensive wireless transmitter architecture employing RF pulse width modulation","authors":"Hyejeong Song, R. Gharpurey","doi":"10.1109/DCAS.2014.6965346","DOIUrl":null,"url":null,"abstract":"A digitally-intensive Cartesian RF transmitter based on three-level pulse width modulation (PWM) is proposed. The architecture utilizes two PLL-based RF-PWM generators to modulate baseband I and Q signals to switching signals at RF, which are used to drive class-D output stages. Due to the use of a ring voltage controlled oscillator (VCO), the architecture is well-suited for multiband operation. A switched capacitor technique is used to provide a differential three-level RF-PWM output. The proposed transmitter is simulated in a 65-nm CMOS process, and achieves a peak output power of 22 dBm with 48% and 33% peak power added efficiency (PAE) at 900 MHz and 1.95 GHz respectively.","PeriodicalId":138665,"journal":{"name":"2014 IEEE Dallas Circuits and Systems Conference (DCAS)","volume":"209 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-11-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2014 IEEE Dallas Circuits and Systems Conference (DCAS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DCAS.2014.6965346","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 5
Abstract
A digitally-intensive Cartesian RF transmitter based on three-level pulse width modulation (PWM) is proposed. The architecture utilizes two PLL-based RF-PWM generators to modulate baseband I and Q signals to switching signals at RF, which are used to drive class-D output stages. Due to the use of a ring voltage controlled oscillator (VCO), the architecture is well-suited for multiband operation. A switched capacitor technique is used to provide a differential three-level RF-PWM output. The proposed transmitter is simulated in a 65-nm CMOS process, and achieves a peak output power of 22 dBm with 48% and 33% peak power added efficiency (PAE) at 900 MHz and 1.95 GHz respectively.