A synchronizer design based on wagging

Abstract

The reliability of a synchronizer depends on its recovery time from metastability, a time which is reduced if the delay through the synchronizer flip flops is large. The D to Q delay in a dual edge triggered D flip flop based on wagging is lower than in other designs allowing more time for metastability recovery. We also apply wagging to the synchronizer itself, reducing its delay even more when compared with conventional cascaded two flip-flops single clock cycle synchronizer, hence increasing the time available for recovery from metastability, and improving its latency. This advantage is greater in multiple cycle synchronizers.