FMAX/VMIN and noise margin impacts of aging on domino read, static write, and retention of 8T 1R1W SRAM arrays in 22nm high-k/metal-gate tri-gate CMOS

Abstract

Progressive impacts of aging on Fmax & noise margin of the precharge-evaluate domino read, and VMIN for differential static write & retention are demonstrated via statistical measurements over the operational lifetime of a 14KB 1R1W 8T SRAM array in 22nm high-k/metal-gate tri-gate CMOS.