Partial SOI LDMOSFETs for high-side switching

Abstract

This paper describes the switching characteristics of Partial SOI LDMOSFET's in high-side configuration based on the results of numerical simulations. The effects of the substrate bias on the on-state and output capacitances of a device on a Partial SOI substrate are discussed and compared to a conventional SOI substrate. It is shown that having the Partial SOI LDMOSFETs operating in source-high conditions will help to achieve a faster turn-off due to reduced parasitic capacitances. In addition, it is shown that the turn-off speed of Partial SOI LDMOSFETs is at least 3 times higher than of conventional SOI LDMOSFETs.