Testing scheduling and control in a parallel processing environment

Abstract

In this paper, the testing scheduling problem based on circuit partitioning is formulated into index coloring of the parallel testing graph (PTG). It is known that the index coloring problem is exponential in time cost, but the testing scheduling problem is proved to be polynomially solvable in theory. According to this result, an optimal testing scheduling algorithm is offered in quadratic time. Finally, a control scheme during testing scheduling is presented, which minimizes the number of the extra control inputs of the multiplexors to 2.1n ICN, here ICN is the index chromatic number of the PTG.<>