A realtime image processing chip set

1986 IEEE International Solid-State Circuits Conference. Digest of Technical Papers Pub Date : 1900-01-01 DOI:10.1109/ISSCC.1986.1157001

P. Ruetz, R. Brodersen

引用次数: 24

Abstract

The development of ICs for a 3×3 linear convolver and non-linear post processors, a 7×7 logic convolver, lookup tables, a contour tracer and line delays, used in realtime image processing at 10MHz, will be discussed. Implementation was in 4μm NMOS.

查看原文本刊更多论文

一种实时图像处理芯片组

将讨论用于10MHz实时图像处理的3×3线性卷积器和非线性后置处理器、7×7逻辑卷积器、查找表、轮廓跟踪器和线路延迟的ic的开发。实现为4μm NMOS。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

求助全文

约1分钟内获得全文求助全文

来源期刊

1986 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

自引率

0.00%

发文量