{"title":"Comparative Study of Doublet OTA Circuit Topologies Operating in Weak Inversion Mode for Low Power Analog IC Applications","authors":"Rishov Aditya, Saheli Sarkel, Soumya Pandit","doi":"10.1109/VLSIDCS47293.2020.9179858","DOIUrl":null,"url":null,"abstract":"In this work, an attempt has been made to present a comprehensive comparative study of CMOS based Doublet OTA topologies typically in weak inversion. The impact of varying the types of load(active or balanced) and area of input differential pairs of three different Doublet OTA configurations on various performance parameters like transconductance gain, 1-dB reference point and Total Harmonic Distortion has been thoroughly investigated by simulating by simulating each configuration using Cadence Virtuoso tool. The results obtained have been summarized and presented in this paper as a ready reference to circuit designers for future design applications.","PeriodicalId":446218,"journal":{"name":"2020 IEEE VLSI DEVICE CIRCUIT AND SYSTEM (VLSI DCS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 IEEE VLSI DEVICE CIRCUIT AND SYSTEM (VLSI DCS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIDCS47293.2020.9179858","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
In this work, an attempt has been made to present a comprehensive comparative study of CMOS based Doublet OTA topologies typically in weak inversion. The impact of varying the types of load(active or balanced) and area of input differential pairs of three different Doublet OTA configurations on various performance parameters like transconductance gain, 1-dB reference point and Total Harmonic Distortion has been thoroughly investigated by simulating by simulating each configuration using Cadence Virtuoso tool. The results obtained have been summarized and presented in this paper as a ready reference to circuit designers for future design applications.