A.V. Pohm, C. Comstock, C. Kohl, I. Ranrnuthu, K. Ranmuthu
{"title":"Temperature Transients In Normal And Giant Magneto-resistance Memory Cells","authors":"A.V. Pohm, C. Comstock, C. Kohl, I. Ranrnuthu, K. Ranmuthu","doi":"10.1109/NVMT.1993.696936","DOIUrl":null,"url":null,"abstract":"Current developmental magneto-resist ive memories using normal material (AMR, anisotropic magneto-resistance) operate with current densities of about 6 million Amps per square centimeter in the magneto-resistive double layers(1). The double layers have a sheet resistance of 10 ohms per square and are deposited onto a half micron thick silicon dioxide layer coveriny the gate poly silicon in the CMOS integrated circuitry used. In this environment, significant heating of the memory elements takes place with most of the temperature rise occurring within a microsecond. If the memory arrays are not properly designed, the increase in resistance arising from heating can obscure the resistance change generated by application of the word field during the read operation. In the case of memory elements made with the developmental giant magneto-resist ive (GMR) material, the temperature rise for the same dielectric thickness is larger because the sheet resistances are typically in the 15 to 25 ohms per square range. Because thermal effects are an important design consideration, analytical and experimental studies were undertaken to examine the thermal behavior of normal and giant magneto-resistive memory cell structures.","PeriodicalId":254731,"journal":{"name":"[1993 Proceedings] Fifth Biennial Nonvolatile Memory Technology Review","volume":"519 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1993-06-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"[1993 Proceedings] Fifth Biennial Nonvolatile Memory Technology Review","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/NVMT.1993.696936","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
Current developmental magneto-resist ive memories using normal material (AMR, anisotropic magneto-resistance) operate with current densities of about 6 million Amps per square centimeter in the magneto-resistive double layers(1). The double layers have a sheet resistance of 10 ohms per square and are deposited onto a half micron thick silicon dioxide layer coveriny the gate poly silicon in the CMOS integrated circuitry used. In this environment, significant heating of the memory elements takes place with most of the temperature rise occurring within a microsecond. If the memory arrays are not properly designed, the increase in resistance arising from heating can obscure the resistance change generated by application of the word field during the read operation. In the case of memory elements made with the developmental giant magneto-resist ive (GMR) material, the temperature rise for the same dielectric thickness is larger because the sheet resistances are typically in the 15 to 25 ohms per square range. Because thermal effects are an important design consideration, analytical and experimental studies were undertaken to examine the thermal behavior of normal and giant magneto-resistive memory cell structures.