{"title":"Performance evaluation of modern broadwell architecture of a parallel & distributed microprocessor","authors":"Kanwal Saeed, G. Raja","doi":"10.1109/ISWSN.2017.8250026","DOIUrl":null,"url":null,"abstract":"In this paper, we have discussed an overview of the modern architectures which were introduced recently and broadly used nowadays. We have evaluated the overall performance of a modern Broadwell architecture using a distributed and shared memory system. The performance has been tested based on the speedup gained after running the parallelized form of the various sequential programs. The analysis has been performed using the benchmark programs of an open source Parmibench suite. The speedups obtained by the parallel distribution of the processor cores compared to the sequential distribution have been observed. The key simulation prospects and features which need to be enhanced in the future products of the low power microprocessor family have been identified. Simulation results show that the low clock frequency processors provide both efficient processing capabilities along with reduced power consumption, after we compared them with a high clock frequency microprocessor.","PeriodicalId":390044,"journal":{"name":"2017 International Symposium on Wireless Systems and Networks (ISWSN)","volume":"5 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 International Symposium on Wireless Systems and Networks (ISWSN)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISWSN.2017.8250026","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
In this paper, we have discussed an overview of the modern architectures which were introduced recently and broadly used nowadays. We have evaluated the overall performance of a modern Broadwell architecture using a distributed and shared memory system. The performance has been tested based on the speedup gained after running the parallelized form of the various sequential programs. The analysis has been performed using the benchmark programs of an open source Parmibench suite. The speedups obtained by the parallel distribution of the processor cores compared to the sequential distribution have been observed. The key simulation prospects and features which need to be enhanced in the future products of the low power microprocessor family have been identified. Simulation results show that the low clock frequency processors provide both efficient processing capabilities along with reduced power consumption, after we compared them with a high clock frequency microprocessor.