A multirate Sigma Delta modulator for GSM standard in CMOS technology

Abstract

A multirate 3rd order modulator targeting GSM standard is presented in this paper. Dynamic Element Matching technique to improve the linearity for the 4-bit DAC in the external feedback path is described. High-level simulations give a maximum SNDR of 79.98 dB while simulation results for a prototype made in a standard 0.6 µm CMOS technology show that the SNDR at the transistor level achieves 78.47 dB including 1% of mismatch, proving a good response of the 4-bit DAC with Dynamic Element Matching technique included.